1. Field of the Invention
The present invention relates to a time division multiplex communication system, and more particularly to an external signal synchronized message signaling apparatus for a time division channel system which can insert a particular message into predetermined channels and transmit it in synchronism with a timing of an external signal.
2. Description of the Related Art
A system is conventionally known wherein a particular message is inserted into particular channels of time division multiplex communication and transmitted in synchronism with an external signal such as a timing control signal. In the system mentioned, an external signal is detected by software or firmware, and a change of the external signal is detected and an instruction to signal a message is issued in response to the detected change.
With the message signaling system described above, however, because the software or firmware has a limitation in processing capability, a long time is required to detect a change of the external signal or issue a message signaling instruction, and consequently, so much time is required after the external signal changes until a message is actually signaled that the message cannot sometimes be signaled at a required timing.
It is an object of the present invention to provide an external signal synchronized message signaling apparatus for a time division channel system by which a message can be signaled in synchronism with a signaling instruction signal from the outside.
It is another object of the present invention to provide an external signal synchronized message signaling apparatus for a time division channel system by which an arbitrary message signal can be signaled in synchronism with a signaling instruction signal from the outside for each of a plurality of channels of time division timings.
It is a further object of the present invention to provide an external signal synchronized message signaling apparatus for a time division channel system by which data of an arbitrary byte length can be signaled in synchronism with a signaling instruction signal from the outside.
In order to attain the objects described above, according to an aspect of the present invention, there is provided an external signal synchronized message signaling apparatus which inserts a message into predetermined channels to form a time division frame and transmits the time division frame in synchronism with an external signal, comprising a message memory having the message stored at predetermined addresses thereof, a read control memory in which information of the addresses of the message memory at which the message is stored and external synchronization information indicative of whether the message should be signaled in synchronism with the external signal are stored in a coordinated relationship at storage positions thereof which corresponds to predetermined channel timings of a time division output frame, and a read controller for reading out, for each channel timing of the time division output frame, the address information and the external synchronization information at the corresponding storage position from the read control memory and, when the external signal is inputted at the channel timing and the external synchronization information indicates synchronized signaling, reading out the message from the message memory based on the address information and signaling the message to the time division output frame.
According to another aspect of the present invention, there is provided an external signal synchronized message signaling apparatus which inserts a message into predetermined channels to form a time division frame and transmits the time division frame in synchronism with an external signal, comprising a message memory in which the message and external synchronization information indicative of whether or not the message should be signaled in synchronism with the external signal are stored in a coordinated relationship at predetermined addresses thereof, a read control memory in which information of the addresses of the message of the message memory is stored at storage positions thereof which corresponds to predetermined channel timings of a time division output frame, and a read controller for reading out, for each of the channel timings of the time division output frame, the address information from the storage position of the read control memory corresponding to the channel timing and reading out the message and the external synchronization information from the message memory based on the address information, and signaling, when the external synchronization information indicates synchronized signaling, the message to the time division output frame.
Each of the external signal synchronized message signaling apparatus may be constructed such that the read control memory has stored therein corresponding to the information of each of the stored addresses idle information indicating whether or not an idle pattern should be outputted to the time division output frame, and the read control refers, when to read out the information of the address, to the idle information and signals, when the idle information indicates signaling of an idle pattern, a predetermined idle pattern to the time division output frame.
Each of the external signal synchronized message signaling apparatus may be constructed such that it further comprises a switch buffer memory having channel data of individual channels of a time division input frame and operable to read out the channel data and signal the channel data to the time division output frame, and the read control memory has stored therein corresponding to the information of each of the addresses channel information indicative of whether the channel data should be outputted to the time division output frame using the stored address information also as read address information for the switch buffer, and the read controller refers, upon reading of the information of the address, to the channel information, reads out, when the channel information indicates signaling of the channel data, the channel data from the switch buffer memory based on the read out address information and signals the read out channel data to the time division output frame.
Further, each of the external signal synchronized message signaling apparatus may be constructed such that the message data is divided in a plurality of data corresponding to different channels and stored at consecutive addresses of the message memory while information of the address of the top one of the divisional data is initially set as the address information in the read control memory, and the read controller successively outputs the divisional data beginning with the top data to the time division output frame at the individual channel timings and overwrites, each time the data is outputted, the address information of the read control memory based on the successive address.
According to a further aspect of the present invention, there is provided an external signal synchronized message signaling apparatus which inserts a message into predetermined channels to form a time division frame and transmits the time division frame in synchronism with an external signal, comprising a switch buffer for receiving a time division input frame as an input thereto and outputting a time division output frame in a sequential write-random read manner, a message memory for outputting a message to a time division output frame, a read control memory in which addresses for reading out data of the switch buffer and the message memory and outputting the data to channels of the time division output frame are stored, the addresses being used commonly for the switch buffer and the message memory, designation information which designates from which one of the switch buffer and the message memory data should be read out so as to be signaled into the time division output frame being stored in the read control memory or the message memory in a coordinated relationship to each of the addresses, and a read controller for referring, when data to be signaled to a channel of the time division output frame is to be outputted based on one of the addresses of the read control memory, to the designation information to read out the data of the switch buffer or the message memory and signaling the data in response to an external signal.
The read controller may calculate, each time data is read out, a next read address and overwrite the address of the timing of the channel of the read control memory with the calculated next read address.
With each of the external signal synchronized message signaling apparatus, a message can be signaled in synchronism with an external signal. Further, since synchronization can be designated for each channel, the same message can be handled in different signaling manners among a plurality of channels. Furthermore, since synchronization designation is performed for each of different messages, synchronization designation can be performed based on a significance of each message itself. In addition, since synchronization designation need not be recognized upon setting of individual channels, simplification of signaling control is facilitated.
The above and other objects, features and advantages of the present invention will become apparent from the following description and the appended claims, taken in conjunction with the accompanying drawings in which like parts or elements are denoted by like reference symbols.